/*****************************************************************************
 * Micron System V3 - I386 Architecture Driver
 * Copyright (C) 2007, Micron System Team
 * Copyright (C) 2007, Martin Tang
 * PROTECTED UNDER MICRON SYSTEM PUBLIC LICENSE AGREEMENT
 *****************************************************************************
 * Design Notes:
 *
 * Interrupt Controller:
 *   Intel 8259A Compatiable
 *
 * Implementation:
 *    0 ~ 31:	IA32 processor internal interrupt
 *   32 ~ 48:	PIC interrupts
 *      0x80:	System call entry
 *     other:	No effect when triggered, reserved for software signal
 *
 * Exception list:
 *   Generated by processor.
 *  NO - Description		Type	ErrCode	Source
 *   0 - Divide Error		fault	no	DIV and IDIV instruction
 *   1 - RESERVED		fault	no	For Intel use only
 *   2 - NMI Interrupt		intr	no	Nonmaskable external interrupt
 *   3 - Breakpoint		trap	no	INT3 Instruction
 *   4 - Overflow		trap	no	INTO Instruction
 *   5 - BOUND Range Exceeded	fault	no	BOUND instruction
 *   6 - Invalid Opcode		fault	no	UD2 instruction or undefined
 *   7 - Device Not Available	fault	no	Float-point or WAIT/FWAIT
 *   8 - Double Fault		abort	yes	Any instruction
 *   9 - Coprocessor Segment OR	fault	no	Floating point instruction
 *  10 - Invalid TSS		fault	yes	Task switch or TSS access
 *  11 - Segment Not Present	fault	yes	Loading segment reg or acc seg
 *  12 - Stack Segment Fault	fault	yes	Stack ops and SS reg loads
 *  13 - General Protection	fault	yes	Any protection check
 *  14 - Page Fault		fault	yes	Any memory reference
 *  15 - RESERVED			no
 *  16 - x87 FPU FP Error	fault	no	x87 FPU or WAIT/FWAIT inst
 *  17 - Alignment Check	fault	yes(0)	Any data ref in mem
 *  18 - Machine Check		abort	no	Err codes
 *  19 - SIMD FP Exception	fault	no	SSE/SSE2/SSE3 FP inst
 * 20~31 Intel Reserved
 * 32~255 User Defined		intr		INT n instruction
 *
 * IRQ list:
 *  -- PIC1 --
 *   0 - timer interrupt
 *   1 - keyboard, mouse, RTC interrupt
 *   2 - video interrupt
 *   3 - serial port 2 interrupt
 *   4 - serial port 1 interrupt
 *   5 - fixed disk interrupt
 *   6 - diskket interrupt
 *   7 - parallel printer interrupt
 *  -- PIC2 --
 *   8 - real-time clock interrupt
 *   9 - redirect cascade
 *  10 - reserved
 *  11 - reserved
 *  12 - mouse interrupt
 *  13 - coprocessor exception interrupt
 *  14 - fixed disk interrupt
 *  15 - reserved
 *
 * References:
 *   Ralf Brown's Interrupt List
 *****************************************************************************/

.extern isr_entry
isr_handler:
	pusha
	pushl %ss
	pushl %ds
	pushl %es
	pushl %fs
	pushl %gs
	mov $0x10, %ax
	mov %ax, %ss
	mov %ax, %ds
	mov %ax, %es
	mov %ax, %fs
	mov %ax, %gs

	movl  %esp, %eax
	pushl %eax
	movl  $isr_entry, %eax
	call *%eax
	popl  %eax

	popl %gs
	popl %fs
	popl %es
	popl %ds
	popl %ss
	popa
	addl $8, %esp	/* clean up the error code that still in the stack */
	iret

.global isr0; isr0:
	pushl $0
	pushl $0
	jmp isr_handler

.global isr1; isr1:
	pushl $0
	pushl $1
	jmp isr_handler
	
.global isr2; isr2:
	pushl $0
	pushl $2
	jmp isr_handler
	
.global isr3; isr3:
	pushl $0
	pushl $3
	jmp isr_handler
	
.global isr4; isr4:
	pushl $0
	pushl $4
	jmp isr_handler

.global isr5; isr5:
	pushl $0
	pushl $5
	jmp isr_handler

.global isr6; isr6:
	pushl $0
	pushl $6
	jmp isr_handler

.global isr7; isr7:
	pushl $0
	pushl $7
	jmp isr_handler

.global isr8; isr8:
	pushl $8
	jmp isr_handler

.global isr9; isr9:
	pushl $0
	pushl $9
	jmp isr_handler

.global isr10; isr10:
	pushl $10
	jmp isr_handler

.global isr11; isr11:
	pushl $11
	jmp isr_handler

.global isr12; isr12:
	pushl $12
	jmp isr_handler
	
.global isr13; isr13:
	pushl $13
	jmp isr_handler
	
.global isr14; isr14:
	pushl $14
	jmp isr_handler

.global isr15; isr15:
	pushl $0
	pushl $15
	jmp isr_handler

.global isr16; isr16:
	pushl $0
	pushl $16
	jmp isr_handler

.global isr17; isr17:
	pushl $17
	jmp isr_handler

.global isr18; isr18:
	pushl $0
	pushl $18
	jmp isr_handler

.global isr19; isr19:
	pushl $0
	pushl $19
	jmp isr_handler

.global isr20; isr20:
	pushl $0
	pushl $20
	jmp isr_handler

.global isr21; isr21:
	pushl $0
	pushl $21
	jmp isr_handler

.global isr22; isr22:
	pushl $0
	pushl $22
	jmp isr_handler
	
.global isr23; isr23:
	pushl $0
	pushl $23
	jmp isr_handler
	
.global isr24; isr24:
	pushl $0
	pushl $24
	jmp isr_handler

.global isr25; isr25:
	pushl $0
	pushl $25
	jmp isr_handler

.global isr26; isr26:
	pushl $0
	pushl $26
	jmp isr_handler

.global isr27; isr27:
	pushl $0
	pushl $27
	jmp isr_handler

.global isr28; isr28:
	pushl $0
	pushl $28
	jmp isr_handler

.global isr29; isr29:
	pushl $0
	pushl $29
	jmp isr_handler

.global isr30; isr30:
	pushl $0
	pushl $30
	jmp isr_handler

.global isr31; isr31:
	pushl $0
	pushl $31
	jmp isr_handler

.global isr32; isr32:
	pushl $0
	pushl $32
	jmp isr_handler
	
.global isr33; isr33:
	pushl $0
	pushl $33
	jmp isr_handler
	
.global isr34; isr34:
	pushl $0
	pushl $34
	jmp isr_handler

.global isr35; isr35:
	pushl $0
	pushl $35
	jmp isr_handler

.global isr36; isr36:
	pushl $0
	pushl $36
	jmp isr_handler

.global isr37; isr37:
	pushl $0
	pushl $37
	jmp isr_handler

.global isr38; isr38:
	pushl $0
	pushl $38
	jmp isr_handler

.global isr39; isr39:
	pushl $0
	pushl $39
	jmp isr_handler

.global isr40; isr40:
	pushl $0
	pushl $40
	jmp isr_handler

.global isr41; isr41:
	pushl $0
	pushl $41
	jmp isr_handler

.global isr42; isr42:
	pushl $0
	pushl $42
	jmp isr_handler
	
.global isr43; isr43:
	pushl $0
	pushl $43
	jmp isr_handler
	
.global isr44; isr44:
	pushl $0
	pushl $44
	jmp isr_handler

.global isr45; isr45:
	pushl $0
	pushl $45
	jmp isr_handler

.global isr46; isr46:
	pushl $0
	pushl $46
	jmp isr_handler

.global isr47; isr47:
	pushl $0
	pushl $47
	jmp isr_handler

.global isr_invalid; isr_invalid:
	pushl $0
	pushl $0xFF
	jmp isr_handler

.global isr_syscall; isr_syscall:
	pushl $0
	pushl $0x80
	jmp isr_handler

